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it job in mumbai client of iQuest consultants |
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Posted on : 2011-04-23 01:00:22
Job
ID: 9954850 |
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| Experience : |
( 4 - 6 yrs.) |
| Location : |
Hubli |
| Education
Qualification : |
UG - B.Tech/B.E. - Electrical, Electronics/Telecom |
| Industry Type
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Semiconductors |
| Key
Skills : |
A
Need to execute the logic synthesis & Static Timing Analysis (STA) for multi-million
gate digital blocks for customers in Deep Sub-micron/Ultra-Deep Sub-micron
technology nodes independently. Work will include constraints definition, constraints
optimization, timing closure, automation etc. Timing closure challenges, design
closure challenges will be abundant along with the opportunity to work with industry
experts on the state-of-the-art processes, tools and flows.
Place of work:
Hubli (Based on project needs, onsite at Bangalore for short durations might be
needed)
Basic Qualifications needed:
? An engineering degree (Bachelor/Masters) in Electrical & Electronics/ Electronics
& Communication/ Instrumentation
? 3+ years of hands-on experience in Logic synthesis/STA. Experience in both
Synthesis & STA preferred.
? Independent contributor with good expertise in
o Logic Synthesis
o Timing Constraints
o Static Timing Analysis
o Timing Closure
? Exposure to industry standard tools (Synopsys, Cadence)
? Good communication & problem solving skills
?
?
Additional Preferred Qualifications:
o Working experience in scripting languages such as PERL, TCL etc.
o Familiarity with make/gmake
o Knowledge of Ultra-Deep Submicron (UDSM) issues in digital backend
o Expertise in formal verification.
o Self-driven in learning and execution, Willingness to work hard and strong
teaming skills.
Compensation & Benefits:
o Attractive package will be offered as per industry practices.
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| Job Type : |
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| Annual Salary
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NA |
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Job Summary |
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Need to execute the logic synthesis & Static Timing Analysis (STA) for multi-million
gate digital blocks for customers in Deep Sub-micron/Ultra-Deep Sub-micron
technology nodes independently. Work will include constraints definition, constraints
optimization, timing closure, automation etc. Timing closure challenges, design
closure challenges will be abundant along with the opportunity to work with industry
experts on the state-of-the-art processes, tools and flows.
Place of work:
Hubli (Based on project needs, onsite at Bangalore for short durations might be
needed)
Basic Qualifications needed:
? An engineering degree (Bachelor/Masters) in Electrical & Electronics/ Electronics
& Communication/ Instrumentation
? 3+ years of hands-on experience in Logic synthesis/STA. Experience in both
Synthesis & STA preferred.
? Independent contributor with good expertise in
o Logic Synthesis
o Timing Constraints
o Static Timing Analysis
o Timing Closure
? Exposure to industry standard tools (Synopsys, Cadence)
? Good communication & problem solving skills
?
?
Additional Preferred Qualifications:
o Working experience in scripting languages such as PERL, TCL etc.
o Familiarity with make/gmake
o Knowledge of Ultra-Deep Submicron (UDSM) issues in digital backend
o Expertise in formal verification.
o Self-driven in learning and execution, Willingness to work hard and strong
teaming skills.
Compensation & Benefits:
o Attractive package will be offered as per industry practices.
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Job Description |
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headLB('', 'Close')
Experience:
4 - 6 Years
Location:
Hubli
Education:
UG - B.Tech/B.E. - Electrical, Electronics/Telecomunication
PG - M.Tech - Computers, Electrical, Electronics/Telecomunication
Industry Type:
Semiconductors/ Electronics
Role:
Team Lead/Tech Lead
Functional Area:
Application Programming, Maintenance
Posted Date:
22 Apr
Desired Candidate Profile
Need to execute the logic synthesis & Static Timing Analysis (STA) for multi-million
gate digital blocks for customers in Deep Sub-micron/Ultra-Deep Sub-micron
technology nodes independently. Work will include constraints definition, constraints
optimization, timing closure, automation etc. Timing closure challenges, design
closure challenges will be abundant along with the opportunity to work with industry
experts on the state-of-the-art processes, tools and flows.
Place of work:
Hubli (Based on project needs, onsite at Bangalore for short durations might be
needed)
Basic Qualifications needed:
? An engineering degree (Bachelor/Masters) in Electrical & Electronics/ Electronics
& Communication/ Instrumentation
? 3+ years of hands-on experience in Logic synthesis/STA. Experience in both
Synthesis & STA preferred.
? Independent contributor with good expertise in
o Logic Synthesis
o Timing Constraints
o Static Timing Analysis
o Timing Closure
? Exposure to industry standard tools (Synopsys, Cadence)
? Good communication & problem solving skills
?
?
Additional Preferred Qualifications:
o Working experience in scripting languages such as PERL, TCL etc.
o Familiarity with make/gmake
o Knowledge of Ultra-Deep Submicron (UDSM) issues in digital backend
o Expertise in formal verification.
o Self-driven in learning and execution, Willingness to work hard and strong
teaming skills.
Compensation & Benefits:
o Attractive package will be offered as per industry practices.
Job Description
Need to execute the logic synthesis & Static Timing Analysis (STA) for multi-million
gate digital blocks for customers in Deep Sub-micron/Ultra-Deep Sub-micron
technology nodes independently. Work will include constraints definition, constraints
optimization, timing closure, automation etc. Timing closure challenges, design
closure challenges will be abundant along with the opportunity to work with industry
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Company Profile |
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\r\n \r\n An US based product company\r\n
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Contact Details |
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| Company
Name : |
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| Email
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nazema@Iquest-consultants.comm |
| Phone No : |
91-20-26851432 |
| Address : |
Nazema 91-20-26851432 (@) nazema@Iquest-consultants.com
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